3 research outputs found

    Design of Voice-Controlled Intelligent Robot

    Get PDF
    This project aims at developing a robot on a field programmable gate array, which can perform tasks by taking the user’s voice commands. The robot has two wheels for locomotion and IR sensors. It can also autonomously direct itself according to the obstacles coming in its path with the help of IR sensors. The objective is to make the robot to recognize a limited set of commands for giving directions (typically 4), and move accordingly. Mel-frequency cepstral coefficients are used as the features that represent the input voice-commands and dynamic time warping algorithm is implemented for the recognition of the commands. The entire voice-command recognition module has both hardware and software components. The software runs on MicroBlaze, a 32-bit soft-core processor from Xilinx. A hardware-software co-design of a voice-command feature extraction circuit is implemented and validated on Spartan-6 FPGA. It is also compared against a complete softwarebased implementation and a complete hardware-based design

    Design of Voice-Controlled Intelligent Robot

    No full text
    This project aims at developing a robot on a field programmable gate array, which can perform\ud tasks by taking the user’s voice commands. The robot has two wheels for locomotion and IR\ud sensors. It can also autonomously direct itself according to the obstacles coming in its path with the\ud help of IR sensors. The objective is to make the robot to recognize a limited set of commands for\ud giving directions (typically 4), and move accordingly. Mel-frequency cepstral coefficients are used\ud as the features that represent the input voice-commands and dynamic time warping algorithm is\ud implemented for the recognition of the commands. The entire voice-command recognition module\ud has both hardware and software components. The software runs on MicroBlaze, a 32-bit soft-core\ud processor from Xilinx. A hardware-software co-design of a voice-command feature extraction circuit\ud is implemented and validated on Spartan-6 FPGA. It is also compared against a complete softwarebased\ud implementation and a complete hardware-based design

    NAKAJIMA Shingo, Postwar Japan\u27s Defense Policy : \u22Yoshida\u27s Policy Line\u22 and Politics, Diplomacy, Military Affairs

    Get PDF
    This paper presents a hardware-software co-design implementation of feature extraction circuit which can be used for speech recognition applications. Mel-frequency cepstral co-efficients are used to represent the features of the speech. A comparison between a complete software implementation and a co-design with both hardware and software components is brought out for the same circuit. The advantage of the hardware-software co-design is brought out by showing that the delay of execution has decreased to 0.0184 seconds from 17.29 seconds for the complete software implementation approach.The MicroBlaze soft-core processor from Xilinx is used in the hardware-software co-design. The processor frequency is chosen to be 66.67MHz. The Xilinx EDK software is used to design the circuit. The entire work is implemented on Atlys Spartan-6 development board
    corecore